Status
| XOSCRDY0 | XOSC 0 Ready |
| XOSCRDY1 | XOSC 1 Ready |
| XOSCFAIL0 | XOSC 0 Clock Failure Detector |
| XOSCFAIL1 | XOSC 1 Clock Failure Detector |
| XOSCCKSW0 | XOSC 0 Clock Switch |
| XOSCCKSW1 | XOSC 1 Clock Switch |
| DFLLRDY | DFLL Ready |
| DFLLOOB | DFLL Out Of Bounds |
| DFLLLCKF | DFLL Lock Fine |
| DFLLLCKC | DFLL Lock Coarse |
| DFLLRCS | DFLL Reference Clock Stopped |
| DPLL0LCKR | DPLL0 Lock Rise |
| DPLL0LCKF | DPLL0 Lock Fall |
| DPLL0TO | DPLL0 Timeout |
| DPLL0LDRTO | DPLL0 Loop Divider Ratio Update Complete |
| DPLL1LCKR | DPLL1 Lock Rise |
| DPLL1LCKF | DPLL1 Lock Fall |
| DPLL1TO | DPLL1 Timeout |
| DPLL1LDRTO | DPLL1 Loop Divider Ratio Update Complete |